Edge AI
On-device & embedded AI: model integration, edge inference on heterogeneous SoCs (e.g. STM32MP1), pragmatic MLOps.
Functional Safety · Edge AI · Cybersecurity
Trustworthy AI for safety-critical systems.
I help teams in safety-critical industries bring AI and connected systems to production — safely and securely. From hazard analysis and safe-state architectures to secure boot and edge-AI monitoring, backed by a rigorous V-model process and real hardware.
Services
What I do
Five overlapping disciplines — because a safe system is also a secure one, and AI does not get a pass on either.
Functional Safety
IEC 61508 / ISO 26262 — HARA, safety concepts, safe-state architectures, V-model, safety cases.
Cybersecurity
IEC 62443 / ISO 21434 — secure boot, TrustZone/OP-TEE, threat modeling (TARA), SBOM, secure update.
Safety & Security for AI
ISO/IEC TR 5469, ISO/PAS 8800 — monitoring 'safety island' architectures, OOD/uncertainty gating, assurance cases.
Consulting & Implementation
From assessment and gap analysis to hands-on implementation and verification on real hardware.
Industries
Safety-critical, across sectors
The standards differ; the discipline does not. I work across regulated, high-consequence domains.
AutomotiveMedTechIndustrial / MachineryRoboticsAerospace / AviationDefenseRail
Selected work
Evidence, not adjectives
Representative work. The flagship is a working demonstrator, built on real hardware in the style of the standards it references.
Edge-AI Safety Island
In progressA Cortex-M4 (Zephyr) safety island supervising an edge-AI workload on a Cortex-A7/Linux (STM32MP157F-DK2). The AI stays untrusted; an independent monitor forces a safe state on AI failure or out-of-distribution input. Built in the style of IEC 61508 + ISO/IEC TR 5469 with a full V-model artifact set.
Demonstrator — not a certified product.
Upstream Zephyr RTOS board support
SubmittedContributed STM32MP157F-DK2 board support to the upstream Zephyr RTOS project (PR #117118) — hardware-verified via the remoteproc framework.
How I work
Evidence-driven, along the V-model
A process auditors recognize — traceable from requirement to proof. No slideware; working systems and artifacts you can take into an assessment.
01
Assess
Gap analysis against the relevant standards. We locate the real risks and the shortest path to credible evidence.
02
Concept
Hazard and threat analysis (HARA, TARA), safety & security concepts, safe-state architectures — designed to be verifiable, not just documented.
03
Build
Hands-on implementation on real hardware: secure boot, safety monitors, edge-AI integration. Working systems, not slideware.
04
Verify
Verification & validation along the V-model, with a traceable artifact set: requirements → design → tests → evidence.
05
Assure
Assurance / safety cases and a clean handover, so your team can maintain, extend and certify the system.
About IGNAO
Independent engineering practice
IGNAO
[ Portrait photo ]
[ Portrait photo ]
IGNAO is an independent engineering practice at the intersection of functional safety, cybersecurity and edge AI — helping teams make machine-learning and connected systems dependable enough for safety-critical use.
My approach is hands-on and evidence-driven: real hardware, standards-grounded process, and an artifact set you can take into an audit. The AI is treated as untrusted by default; safety and security are architected in, not bolted on.
Standards fluency
IEC 61508ISO 26262IEC 62443ISO 21434ISO/IEC TR 5469ISO/PAS 8800
Contact
Let's talk
Have a safety- or security-critical AI or embedded challenge? Tell me what you're building and where it needs to be dependable — I usually reply within a couple of working days.